DOG TREAT Module
Simple module to allow the dog to use the PIC12F752 to control the lift fan

InitTREATHardware
Calls InitTREATUART, which lives in HardwareInits.c
Print “TREAT Hardware Initialized”


InitTREATUART (located in HardwareInits.c to group with all hardware inits)
Takes nothing, returns nothing
        Enable UART3 in RCGCUART register (enables clock to UART3)
        Wait for module to be ready (by polling Bit 1 of PRUART)
        Enable clock to Port C
        Wait for GPIO module to be ready (PRGPIO)
        Configure PC6 (RX) as digital input and PC7 (TX) as digital output
        Select Alternate Function (AFSEL) on Port C pins 6 and 7
        Configure PMCn fields in GPIOCTL register to assign UART to PC6 and PC7, set to 1
        Disable UART3 by clearing UARTEN in UARTCTL register
        Write integer portion of Baud Rate Divisor (260) to UARTIBRD
        Write fractional portion of Baud Rate Divisor (27) to UARTFBRD
        Write 0x03 to WLEN bits in UARTLCRH to set 8 bit word length
        Enable TX and UARTEN in UARTCTL (save RX, EOT interrupt for later)
Globally enable interrupts (if not already set) 
Enable NVIC interrupt for UART3, number 59
Disable UART TX interrupt to start


Note: Send 0 to TREAT to start in InitDOG to start with treat in off position


TREATTx
Takes uint16_t, returns bool


if there is room to transfer a byte (Txmit Fifo Empty = TXFE is set)
Write the new data to data register UARTDR
Enable UART TXmit interrupt by setting interrupt mask bit in UART mask reg
so that when the byte is done sending, it fires an interrupt
return true because first byte was successfully transmitted
Else
there is not room to transmit a byte because the transmit fifo is full


TREATTmitISR
Takes nothing, returns nothing


(Only respond to the interrupt that we care about: TXMIS)
If transmit interrupts are unmasked and it fired
        Clear UART TXmit interrupt by setting TXIC in UARTICR (interrupt clear register)
        Until next sent, disable UART3 Interrupt Mask
              increment TREAT ISR Count
else        
TXMIS is not set, meaning it's not a transmit interrupt, so take no action